1. Field of the Invention
The present invention relates to a power supply voltage dropping circuit, a semiconductor device, a power supply voltage circuit, a power supply voltage dropping method, and a power supply voltage outputting method, and particularly to a power supply voltage dropping circuit in which an Nch (N-channel) transistor is used as the output stage, a semiconductor device, a power supply voltage circuit, a power supply voltage dropping method, and a power supply voltage outputting method.
2. Description of Related Art
In semiconductor devices, a voltage dropping circuit that reduces the external power supply voltage to generate an internal power supply voltage is known. The internal power supply voltage is supplied to a semiconductor element which is driven by a voltage lower than the external power supply voltage.
Japanese Patent Laid-Open No. 2000-148263 describes a voltage dropping circuit in which the output stage is a Pch (P-channel) transistor.
FIG. 1 is a circuit diagram showing a voltage dropping circuit in which the output stage is a Pch transistor. In FIG. 1, voltage dropping circuit 100 includes Pch transistor 101 and amplifier 102.
External power supply voltage VDD is supplied to the source of Pch transistor 101. The output of amplifier 102 is supplied to the gate of Pch transistor 101. The drain of Pch transistor 101 outputs voltage VOUT that is lowered in external power supply voltage VDD according to the output of amplifier 102.
Amplifier 102 amplifies the difference between reference voltage VREF and a voltage generated at the drain of Pch transistor 101, using external power supply voltage VDD as a power supply voltage, to generate a control voltage. Amplifier 102 supplies the control voltage to the gate of Pch transistor 101.
Therefore, in voltage dropping circuit 100, control such that the voltage generated at the drain of Pch transistor 101 is maintained at reference voltage VREF is performed.
Also, in recent years, due to lower voltages of semiconductor devices, external power supply voltage VDD has decreased from 1.8 V to 1.4 V, 1.2 V, and 1.0 V.
In the voltage dropping circuit in which the output stage is a Pch transistor, when external power supply voltage VDD decreases, Vgs (the voltage between the source and the gate) and Vds (the voltage between the source and the drain) of the Pch transistor both decrease. Thus, the driving ability of the Pch transistor that is the output stage decreases.
There is a voltage dropping circuit in which an Nch transistor is used as the output stage to reduce the decrease in driving ability (see Japanese Patent Laid-Open No. 2000-148263 and Japanese Patent Laid-Open No. 2006-31158).
In this voltage dropping circuit, the Nch transistor is used as the output stage, so that increased power supply voltage VPP that is obtained by increasing external power supply voltage VDD should be used as the power supply of the amplifier.
FIG. 2 is a circuit diagram showing a voltage dropping circuit in which the output stage is an Nch transistor. In FIG. 2, voltage dropping circuit 200 includes Nch transistor 201, amplifier 202, and voltage raising circuit 203.
External power supply voltage VDD is supplied to the drain of Nch transistor 201. The output of amplifier 202 is supplied to the gate of Nch transistor 201. The source of Nch transistor 201 outputs voltage VOUT that is lowered in external power supply voltage VDD according to the output of amplifier 202.
Voltage raising circuit 203 raises external power supply voltage VDD to generate voltage VPP. For example, voltage raising circuit 203 includes a charge pump and the like.
Amplifier 202 amplifies the difference between reference voltage VREF and the voltage generated at the source of Nch transistor 201, using voltage VPP as a power supply voltage, to generate a control voltage. Amplifier 202 supplies the control voltage to the gate of Nch transistor 201.
Therefore, in voltage dropping circuit 200, control such that the voltage generated at the source of Nch transistor 201 is maintained at reference voltage VREF is performed.
The voltage dropping circuit in which the output stage is an Nch transistor raises external power supply voltage VDD, so that the voltage dropping circuit requires a voltage raising circuit.
The voltage raising circuit raises the voltage step by step, so that due to its characteristics, the voltage raising circuit easily generates noise during voltage raising. Thus, it is more likely that noise generated during voltage raising is included in the raised power supply voltage output from the voltage raising circuit.
Therefore, the amplifier in the voltage dropping circuit in which the output stage is an Nch transistor is easily affected by the noise included in the raised power supply voltage. Thus, there has been a problem in which the voltage dropping circuit in which the output stage is an Nch transistor is affected by the noise included in the raised power supply voltage.